\+Heading-1\ Index \+Heading-4\ A \+Main Paragraph\ Aborts 167, 169, 172, 185 ABS 195 acc 79 Acorn Calling Standard 62 ACS 196 ADC 49 ADD 38, 49 Address Bus 6, 15 Address Exception 167, 173, 185 Addressing modes 57 ADDS 38 AL 35 ALIGN 84, 85 ALU 18 Ampersand 14 AND 45 Architechture 6 Arithmetic Shift 42, 44 Arrays 144, 146 Ascending stacks 62, 63 ASCII 123 ASCII-binary conversion 138 ASL 42, 44 ASN 196 ASR 42, 44 Assembler options 75, 76 Assembler passes 75 ATN 196 \+Heading-4\ B \+Main Paragraph\ Barrel Shifter 18 BBC BASIC assembler 72 BIC 45 Binary Arithmetic 11 Bit fields 150 BL 68 Branch ALways 35 Branch if Carry Clear 36 Branch if Carry Set 36 Branch if EQual 35 Branch if Greater or Equal 37 Branch if Greater Than 37 Branch if HIgher 36 Branch if Less or Equal 37 Branch if Less Than 37 Branch if Lower or Same 37 Branch if MInus 36 Branch if Not Equal 35 Branch if oVerflow Clear 36 Branch if oVerflow Set 36 Branch if PLus 36 Branch instructions 67 Branch NeVer 35 Branch offsets 68 Branch with link 28, 68, 108 Branching 20, 32 Busses 6 Bytes 9 \+Heading-4\ C \+Main Paragraph\ CALL 75, 92 Calling machine code 91 Case 81 CC 36 Central Processing Unit 6 Character strings 126 Character translation 127 Characters 10, 123 Clock 19 CMF 197 CMFE 197 CMN 52 CMP 51 CNF 197 CNFE 197 Co-processor absent 178 Co-processor busy 178 Co-processor instructions 177-186 Co-processor types 179 Comparing strings 129 Compilers 3 Computer Architecture 6 Condition codes 35 Conditional assembly 88 Control structures 94 COS 196 CPA 178 CPB 178 CPI 177 CPU 6, 16 CS 36 Cycles 8 \+Heading-4\ D \+Main Paragraph\ DA 66 Data Bus 6 Data manipulation 37-56 Data operations 32 Data Structures 122 DB 66 Defining space 83 Descending stacks 62,63 DIM 73 Division 135 Division program 137 Double precision 199 Dynamic range 189 \+Heading-4\ E \+Main Paragraph\ EA 63 ED 63 EOR 47 EQ 35 EQU 83 Equate statements 83 EXP 196 Extended precision 200 FA 63 Fast interrupt flag 29, 30 FD 63 Fibonacci program 119 FIQ 29, 167, 176 FIX 196 Flags: \+Hanging indent\ Z 28, 29, 35, 37, 197 N 28, 29, 36, 37, 197 C 28, 29, 36, 37, 197 V 28, 29, 36, 37, 197 I 28, 29 F 28, 29 S1 28, 29 S0 28, 29 IRQ 29 FIQ 29 \+Main Paragraph\ Floating point 33, 142 Floating point unit 179, 187-201 FLT 196 FN 89 FPU 179, 187-201 FPU control register 193 FPU data processing 194 FPU status register 191 \+Heading-4\ G \+Main Paragraph\ GE 37 General purpose registers 28 Group Five instructions 69 Group Four instructions 67 Group One Instructions 37-56 Group One-A instructions 55 Group Three instructions 61-67 Group Two instructions 56-61 GT 37 \+Heading-4\ H \+Main Paragraph\ Hexadecimal 13 HI 36 \+Heading-4\ I \+Main Paragraph\ I/O 7, 22 IA 66 IB 66 IFÉTHENÉELSE 90 Immediate operands 39 INF 190 Input/Output 7, 22 Inside The ARM 22 Instruction classes: \+Hanging indent\ Branching 32 Data operations 32 Floating point 33 Load and Save 32 Multiple load and save 32 SWI 32 \+Main Paragraph\ Instruction cycles 17 Instruction extensions 161 Instruction set 31, 34-71 Instruction timings 70, 186 Integers 133 Interpreters 3, 5 Interrupt flag 29, 30 IRQ 29, 167, 174 \+Heading-4\ L \+Main Paragraph\ Large Numbers 14 LDF 198 LDM 61, 65 LDR 59 LE 37 LGN 195 LIFO 62 link 79 Link register 28 Linked lists 155 List handling 155 Load and store 32, 56-61 LOG 195 Logical Operations 18 Logical Shift 41, 42, 44 Long transfers 185 Loops 103 LS 37 LSL 41, 44 LSR 42, 44 LT 37 \+Heading-4\ M \+Main Paragraph\ Macros 88 MEMC 25, 165, 169, 170 Memory 7, 22 Memory addressing 23 Memory allocation 154 Memory Controller 25 Memory map 165 MI 36 MLA 55 Mnemonics 2 MNF 195 MNM 194 MOV 48 MUL 55 Multi-way branches 99 Multiple load and store 32, 61-67 Multiplication 135 MVF 195 MVN 48 \+Heading-4\ N \+Main Paragraph\ n-cycles 70 NAN 190 NE 35 Negative Numbers 12 Non-user modes 160 Number format 199 NV 35 \+Heading-4\ O \+Main Paragraph\ O% 81,82 Offset assembly 81 Operands 3 OPT 75, 76 ORR 46 \+Heading-4\ P \+Main Paragraph\ P% 73, 81 Packed decimal 200 Parameter blocks 116 Parameter passing 112 PC 17, 28 PC relative addressing 60 Pipelining 17, 68 PL 36 Position independence 95 Post-indexed addressing 58 Pre-indexed addressing 57 Precision 188 Procedures 107 Program Counter 17, 28 Programming principles 94 RAM 16 Reference parameters 113 Register parameters 112 Registers: \+Hanging indent\ General 19, 22 R0-R13 28 R14 28, 68 R15 28, 52 \+Main Paragraph\ Reserving space 83 RESET 167 RFS 197 RND 195 ROM 16 ROR 43, 44 ROtate Right 43, 44 Rotate Right with eXtend 43, 44 Rounding 189 RRX 43, 44 RSB 50 RSC 51 \+Heading-4\ S \+Main Paragraph\ S option 35 s-cycles 70 SBC 50 Shift 18 Shifted operands 40 Sieve program 153 SIN 196 Single precision 199 SoftWare Interrupt 32, 69, 167, 169 SP 62 Special registers 28 Special values 190 SQT 195 Stack parameters 117 Stack Pointer 62 Stacks 61 Status flags 28 Status register 29 STF 198 STM 61, 63 Store multiple registers 61, 63 STR 57 String allocation 156 String arrays 146 String comparisons 129 Strings of characters 126 Structured types 144 SUB 50 Subroutines 68, 107 Substrings 130 Supervisor mode 30 SWI 32, 69 SWI ReadC 69 SWI WriteC 69 SWI WriteI 79 \+Heading-4\ T \+Main Paragraph\ TAN 196 TEQ 47 Tick 19 TST 46 Two's Complement 12 \+Heading-4\ U \+Main Paragraph\ Undefined instruction vector 167 User mode 30, 166 USR 91 \+Heading-4\ V \+Main Paragraph\ VC 36 Vectors 166 Virtual memory 23, 169, 170 VS 36 \+Heading-4\ W \+Main Paragraph\ WFS 197 Word size 22 Write-back 58 Writing for ROM 122 [ ] 72 \ 78 ^ 65& 14 ; 73